
point_and_string:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004004f8 <.init>:
  4004f8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4004fc:	910003fd 	mov	x29, sp
  400500:	94000036 	bl	4005d8 <printf@plt+0x58>
  400504:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400508:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400510 <strlen@plt-0x20>:
  400510:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400514:	90000090 	adrp	x16, 410000 <printf@plt+0xfa80>
  400518:	f947fe11 	ldr	x17, [x16, #4088]
  40051c:	913fe210 	add	x16, x16, #0xff8
  400520:	d61f0220 	br	x17
  400524:	d503201f 	nop
  400528:	d503201f 	nop
  40052c:	d503201f 	nop

0000000000400530 <strlen@plt>:
  400530:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a80>
  400534:	f9400211 	ldr	x17, [x16]
  400538:	91000210 	add	x16, x16, #0x0
  40053c:	d61f0220 	br	x17

0000000000400540 <__libc_start_main@plt>:
  400540:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a80>
  400544:	f9400611 	ldr	x17, [x16, #8]
  400548:	91002210 	add	x16, x16, #0x8
  40054c:	d61f0220 	br	x17

0000000000400550 <__gmon_start__@plt>:
  400550:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a80>
  400554:	f9400a11 	ldr	x17, [x16, #16]
  400558:	91004210 	add	x16, x16, #0x10
  40055c:	d61f0220 	br	x17

0000000000400560 <abort@plt>:
  400560:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a80>
  400564:	f9400e11 	ldr	x17, [x16, #24]
  400568:	91006210 	add	x16, x16, #0x18
  40056c:	d61f0220 	br	x17

0000000000400570 <puts@plt>:
  400570:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a80>
  400574:	f9401211 	ldr	x17, [x16, #32]
  400578:	91008210 	add	x16, x16, #0x20
  40057c:	d61f0220 	br	x17

0000000000400580 <printf@plt>:
  400580:	b0000090 	adrp	x16, 411000 <printf@plt+0x10a80>
  400584:	f9401611 	ldr	x17, [x16, #40]
  400588:	9100a210 	add	x16, x16, #0x28
  40058c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400590 <.text>:
  400590:	d280001d 	mov	x29, #0x0                   	// #0
  400594:	d280001e 	mov	x30, #0x0                   	// #0
  400598:	aa0003e5 	mov	x5, x0
  40059c:	f94003e1 	ldr	x1, [sp]
  4005a0:	910023e2 	add	x2, sp, #0x8
  4005a4:	910003e6 	mov	x6, sp
  4005a8:	580000c0 	ldr	x0, 4005c0 <printf@plt+0x40>
  4005ac:	580000e3 	ldr	x3, 4005c8 <printf@plt+0x48>
  4005b0:	58000104 	ldr	x4, 4005d0 <printf@plt+0x50>
  4005b4:	97ffffe3 	bl	400540 <__libc_start_main@plt>
  4005b8:	97ffffea 	bl	400560 <abort@plt>
  4005bc:	00000000 	.inst	0x00000000 ; undefined
  4005c0:	0040068c 	.inst	0x0040068c ; undefined
  4005c4:	00000000 	.inst	0x00000000 ; undefined
  4005c8:	00400710 	.inst	0x00400710 ; undefined
  4005cc:	00000000 	.inst	0x00000000 ; undefined
  4005d0:	00400790 	.inst	0x00400790 ; undefined
  4005d4:	00000000 	.inst	0x00000000 ; undefined
  4005d8:	90000080 	adrp	x0, 410000 <printf@plt+0xfa80>
  4005dc:	f947f000 	ldr	x0, [x0, #4064]
  4005e0:	b4000040 	cbz	x0, 4005e8 <printf@plt+0x68>
  4005e4:	17ffffdb 	b	400550 <__gmon_start__@plt>
  4005e8:	d65f03c0 	ret
  4005ec:	00000000 	.inst	0x00000000 ; undefined
  4005f0:	b0000080 	adrp	x0, 411000 <printf@plt+0x10a80>
  4005f4:	91010000 	add	x0, x0, #0x40
  4005f8:	b0000081 	adrp	x1, 411000 <printf@plt+0x10a80>
  4005fc:	91010021 	add	x1, x1, #0x40
  400600:	eb00003f 	cmp	x1, x0
  400604:	540000a0 	b.eq	400618 <printf@plt+0x98>  // b.none
  400608:	90000001 	adrp	x1, 400000 <strlen@plt-0x530>
  40060c:	f943d821 	ldr	x1, [x1, #1968]
  400610:	b4000041 	cbz	x1, 400618 <printf@plt+0x98>
  400614:	d61f0020 	br	x1
  400618:	d65f03c0 	ret
  40061c:	d503201f 	nop
  400620:	b0000080 	adrp	x0, 411000 <printf@plt+0x10a80>
  400624:	91010000 	add	x0, x0, #0x40
  400628:	b0000081 	adrp	x1, 411000 <printf@plt+0x10a80>
  40062c:	91010021 	add	x1, x1, #0x40
  400630:	cb000021 	sub	x1, x1, x0
  400634:	9343fc21 	asr	x1, x1, #3
  400638:	8b41fc21 	add	x1, x1, x1, lsr #63
  40063c:	9341fc21 	asr	x1, x1, #1
  400640:	b40000a1 	cbz	x1, 400654 <printf@plt+0xd4>
  400644:	90000002 	adrp	x2, 400000 <strlen@plt-0x530>
  400648:	f943dc42 	ldr	x2, [x2, #1976]
  40064c:	b4000042 	cbz	x2, 400654 <printf@plt+0xd4>
  400650:	d61f0040 	br	x2
  400654:	d65f03c0 	ret
  400658:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40065c:	910003fd 	mov	x29, sp
  400660:	f9000bf3 	str	x19, [sp, #16]
  400664:	b0000093 	adrp	x19, 411000 <printf@plt+0x10a80>
  400668:	39410260 	ldrb	w0, [x19, #64]
  40066c:	35000080 	cbnz	w0, 40067c <printf@plt+0xfc>
  400670:	97ffffe0 	bl	4005f0 <printf@plt+0x70>
  400674:	52800020 	mov	w0, #0x1                   	// #1
  400678:	39010260 	strb	w0, [x19, #64]
  40067c:	f9400bf3 	ldr	x19, [sp, #16]
  400680:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400684:	d65f03c0 	ret
  400688:	17ffffe6 	b	400620 <printf@plt+0xa0>
  40068c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400690:	910003fd 	mov	x29, sp
  400694:	90000000 	adrp	x0, 400000 <strlen@plt-0x530>
  400698:	911f0000 	add	x0, x0, #0x7c0
  40069c:	f9000fa0 	str	x0, [x29, #24]
  4006a0:	f9400fa0 	ldr	x0, [x29, #24]
  4006a4:	f9000ba0 	str	x0, [x29, #16]
  4006a8:	f9400ba0 	ldr	x0, [x29, #16]
  4006ac:	97ffffb1 	bl	400570 <puts@plt>
  4006b0:	f9400fa1 	ldr	x1, [x29, #24]
  4006b4:	f9400fa3 	ldr	x3, [x29, #24]
  4006b8:	910063a2 	add	x2, x29, #0x18
  4006bc:	90000000 	adrp	x0, 400000 <strlen@plt-0x530>
  4006c0:	911f6000 	add	x0, x0, #0x7d8
  4006c4:	97ffffaf 	bl	400580 <printf@plt>
  4006c8:	f9400ba1 	ldr	x1, [x29, #16]
  4006cc:	f9400ba3 	ldr	x3, [x29, #16]
  4006d0:	910043a2 	add	x2, x29, #0x10
  4006d4:	90000000 	adrp	x0, 400000 <strlen@plt-0x530>
  4006d8:	91200000 	add	x0, x0, #0x800
  4006dc:	97ffffa9 	bl	400580 <printf@plt>
  4006e0:	f9400fa0 	ldr	x0, [x29, #24]
  4006e4:	97ffff93 	bl	400530 <strlen@plt>
  4006e8:	aa0003e1 	mov	x1, x0
  4006ec:	90000000 	adrp	x0, 400000 <strlen@plt-0x530>
  4006f0:	9120a000 	add	x0, x0, #0x828
  4006f4:	aa0103e2 	mov	x2, x1
  4006f8:	d2800101 	mov	x1, #0x8                   	// #8
  4006fc:	97ffffa1 	bl	400580 <printf@plt>
  400700:	52800000 	mov	w0, #0x0                   	// #0
  400704:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400708:	d65f03c0 	ret
  40070c:	00000000 	.inst	0x00000000 ; undefined
  400710:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400714:	910003fd 	mov	x29, sp
  400718:	a901d7f4 	stp	x20, x21, [sp, #24]
  40071c:	90000094 	adrp	x20, 410000 <printf@plt+0xfa80>
  400720:	90000095 	adrp	x21, 410000 <printf@plt+0xfa80>
  400724:	91374294 	add	x20, x20, #0xdd0
  400728:	913722b5 	add	x21, x21, #0xdc8
  40072c:	a902dff6 	stp	x22, x23, [sp, #40]
  400730:	cb150294 	sub	x20, x20, x21
  400734:	f9001ff8 	str	x24, [sp, #56]
  400738:	2a0003f6 	mov	w22, w0
  40073c:	aa0103f7 	mov	x23, x1
  400740:	9343fe94 	asr	x20, x20, #3
  400744:	aa0203f8 	mov	x24, x2
  400748:	97ffff6c 	bl	4004f8 <strlen@plt-0x38>
  40074c:	b4000194 	cbz	x20, 40077c <printf@plt+0x1fc>
  400750:	f9000bb3 	str	x19, [x29, #16]
  400754:	d2800013 	mov	x19, #0x0                   	// #0
  400758:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  40075c:	aa1803e2 	mov	x2, x24
  400760:	aa1703e1 	mov	x1, x23
  400764:	2a1603e0 	mov	w0, w22
  400768:	91000673 	add	x19, x19, #0x1
  40076c:	d63f0060 	blr	x3
  400770:	eb13029f 	cmp	x20, x19
  400774:	54ffff21 	b.ne	400758 <printf@plt+0x1d8>  // b.any
  400778:	f9400bb3 	ldr	x19, [x29, #16]
  40077c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400780:	a942dff6 	ldp	x22, x23, [sp, #40]
  400784:	f9401ff8 	ldr	x24, [sp, #56]
  400788:	a8c47bfd 	ldp	x29, x30, [sp], #64
  40078c:	d65f03c0 	ret
  400790:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400794 <.fini>:
  400794:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400798:	910003fd 	mov	x29, sp
  40079c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4007a0:	d65f03c0 	ret
